Download TC74ACT257P Datasheet PDF
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TC74ACT257P Key Features

  • High speed: tpd = 5.8 ns (typ.) at VCC = 5 V
  • Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
  • patible with TTL outputs: VIL = 0.8 V (max)
  • Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
  • Balanced propagation delays: tpLH ∼- tpHL
  • Pin and function patible with 74F257

TC74ACT257P Description

It achieve the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are patible with TTL or NMOS and CMOS output voltage levels.