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TC74ACT521P Key Features

  • High speed: tpd = 6.4 ns (typ.) at VCC = 5 V
  • Low power dissipation: ICC = 8 μA (max) at Ta = 25°C
  • patible with TTL outputs: VIL = 0.8 V (max)
  • Symmetrical output impedance: |IOH| = IOL = 24 mA (min)
  • Balanced propagation delays: tpLH ∼- tpHL
  • Pin and function patible with 74F521

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TC74ACT521P Description

It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. This device may be used as a level converter for interfacing TTL or NMOS to High Speed CMOS. The inputs are patible with TTL, NMOS and CMOS output voltage levels.