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TC74HC11AFN - Triple 3-Input AND Gate

Download the TC74HC11AFN datasheet PDF (TC74HC11AP included). The manufacturer datasheet provides complete specifications, pinout details, electrical characteristics, and typical applications for triple 3-input and gate.

Features

  • High speed: tpd = 7 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 1 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 6 V.
  • Pin and function compatible with 74LS11 Pi.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74HC11AP-Toshiba.pdf) that lists specifications for multiple related part numbers.
Other Datasheets by Toshiba

Full PDF Text Transcription

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TC74HC11AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC11AP,TC74HC11AF,TC74HC11AFN Triple 3-Input AND Gate The TC74HC11A is a high speed CMOS 3-INPUT AND GATE fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The internal circuit is composed of 4 stages including a buffer output, which provide high noise immunity and stable output. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 7 ns (typ.
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