Datasheet4U Logo Datasheet4U.com

TC74HC139AP - DUAL 2 TO 4 LINE DECODER

Download the TC74HC139AP datasheet PDF. This datasheet also covers the TC74HC139 variant, as both devices belong to the same dual 2 to 4 line decoder family and are provided as variant models within a single manufacturer datasheet.

Key Features

  • High speed: tpd = 16 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced propagation dela.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (TC74HC139_Toshiba.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
TC74HC139AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC139AP, TC74HC139AF Dual 2-to-4 Line Decoder The TC74HC139A is a high speed CMOS 2-to-4 LINE DECODER/DEMULTIPLEXER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. The active low enable input can be used for gating or it can be used as a data input for demultiplexing applications. When the enable input is held “H”, all four outputs are fixed at a high logic level independent of the other inputs. All inputs are equipped with protection circuits against static discharge or transient excess voltage. Features • High speed: tpd = 16 ns (typ.