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TC74HC4028AF Datasheet BCD-to-Decimal Decoder

Manufacturer: Toshiba

Overview: TC74HC4028AP/AF TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC4028AP, TC74HC4028AF BCD-to-Decimal Decoder The TC74HC4028A is a high speed CMOS BCD-to-DECIMAL DECODER fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent LSTTL while maintaining the CMOS low power dissipation. A BCD code applied to the four inputs (A-D) sets a high level at one of ten decoded outputs. A illegal BCD code such as eleven thru fifteen sets all outputs low. This device can be used as 3-to-8 LINE DECODER when input D is held high. This device is useful for code conversion, address decoding, memory selection, multiplexing, or readout decoding. All inputs are equipped with protection circuits against static discharge or transient excess voltage.

Download the TC74HC4028AF datasheet PDF. This datasheet also includes the TC74HC4028AP variant, as both parts are published together in a single manufacturer document.

Key Features

  • High speed: tpd = 18 ns (typ. ) at VCC = 5 V.
  • Low power dissipation: ICC = 4 μA (max) at Ta = 25°C.
  • High noise immunity: VNIH = VNIL = 28% VCC (min).
  • Output drive capability: 10 LSTTL loads.
  • Symmetrical output impedance: |IOH| = IOL = 4 mA (min).
  • Balanced propagation delays: tpLH ∼.
  • tpHL.
  • Wide operating voltage range: VCC (opr) = 2 to 6 V.
  • Pin and function compatible with 4028B. Pin Assignment TC74HC4028AP TC74HC402.

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