TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
Octal Schmitt D-Type Latch with 3-State Output
The TC74VHCV573FK is an advanced high speed CMOS OCTAL LATCH
with 3-STATE OUTPUT fabricated with silicon gate C2MOS technology.
It achieves the high speed operation similar to equivalent Bipolar Schottky
TTL while maintaining the CMOS low power dissipation.
This 8-bit D-type latch is controlled by a latch enable input (LE) and an output
enable input ( OE ).
When the OE input is high, the eight outputs are in a high impedance state.
Input pin have hysteresis between the positive-going and negative-going
thresholds. Thus the TC74VHCV573FK is capable of squaring up transitions
of slowly changing input signals and provides an improved noise immunity.
Input protection and output circuit ensure that 0 to 5.5 V can be applied to
the input and output (Note) pins without regard to the supply voltage. These
structure prevents device destruction due to mismatched supply and
input/output voltages such as battery back up, etc.
Note: Output in off-state.
High speed: tpd = 5.0 ns (typ.) at VCC = 5 V
Low power dissipation: ICC = 2 μA (max) at Ta = 25°C
Wide operating voltage range: VCC (opr) = 1.8 V to 5.5 V
Ouput current: |IOH|/IOL = 16 mA (min) (VCC = 4.5 V)
Available in VSSOP (US)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 573 type
: 0.03 g ( typ.)
Toshiba Electronic Devices & Storage Corporation
Start of commercial production