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TH58NVG3S0HTAI0 Datasheet

Manufacturer: Toshiba
TH58NVG3S0HTAI0 datasheet preview

Datasheet Details

Part number TH58NVG3S0HTAI0
Datasheet TH58NVG3S0HTAI0-Toshiba.pdf
File Size 716.97 KB
Manufacturer Toshiba
Description 8 GBIT (1G x 8 BIT) CMOS NAND E2PROM
TH58NVG3S0HTAI0 page 2 TH58NVG3S0HTAI0 page 3

TH58NVG3S0HTAI0 Overview

The device has two 4352-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 4352-byte increments. The Erase operation is implemented in a single block unit (256 Kbytes  16 Kbytes: The TH58NVG3S0HTAI0 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for mand inputs.

TH58NVG3S0HTAI0 Key Features

  • Organization
  • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy
  • Mode control Serial input/output
  • Number of valid blocks Min 4016 blocks Max 4096 blocks
  • Power supply VCC  2.7V to 3.6V
  • Access time
  • Program/Erase time Auto Page Program Auto Block Erase
  • Operating current Read (25 ns cycle)
  • Package TSOP I 48-P-1220-0.50 (Weight: 0.54 g typ.)
  • 8 bit ECC for each 512Byte is required
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