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TH58NVG3S0HBAI6 Datasheet

8g-bit (1g X 8 Bit) CMOS Nand E2prom

Manufacturer: Toshiba

TH58NVG3S0HBAI6 Overview

The device has two 4352-byte static registers which allow program and read data to be transferred between the register and the memory cell array in 4352-byte increments. The Erase operation is implemented in a single block unit (256 Kbytes  16 Kbytes: The TH58NVG3S0HBAI6 is a serial-type memory device which utilizes the I/O pins for both address and data input/output as well as for mand inputs.

TH58NVG3S0HBAI6 Key Features

  • Organization
  • Modes Read, Reset, Auto Page Program, Auto Block Erase, Status Read, Page Copy, Multi Page Program, Multi Block Erase, M
  • Mode control Serial input/output mand control
  • Number of valid blocks Min 4016 blocks Max 4096 blocks
  • Power supply VCC  2.7V to 3.6V
  • Access time Cell array to register 25 s max Serial Read Cycle 25 ns min (CL=50pF)
  • Program/Erase time Auto Page Program Auto Block Erase
  • Operating current Read (25 ns cycle) Program (avg.) Erase (avg.) Standby
  • Package P-VFBGA67-0608-0.80-001 (Weight: 0.101 g typ.)
  • 8 bit ECC for each 512Byte is required

TH58NVG3S0HBAI6 Distributor