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TC59YM916BKG32B - 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device

This page provides the datasheet information for the TC59YM916BKG32B, a member of the TC59YM916BKG24A 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device family.

Description

The timing diagrams in Figure 1 illustrate XDR DRAM device write and read transactions.

There are three sets of pins used for normal memory access transactions: CFM/CFMN clock pins, RQ11…RQ0 request pins, and DQ15…DQ0/DQN15DQN0 data pins.

Features

  • Highest pin bandwidth available.
  • 4000/3200/2400 Mb/s Octal Data Rate (ODR) Signaling.
  • Bi-directional differential RSL (DRSL) Flexible read/write bandwidth allocation Minimum pin count.
  • Programmable on-chip termination Adaptive impedance matching Reduced system cost and routing complexity.
  • Highest sustained bandwidth per DRAM device.
  • 8000/6400/4800 MB/s sustained data rate 8 banks: bank-interl.

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Datasheet Details

Part number TC59YM916BKG32B
Manufacturer Toshiba America Electronic
File Size 1.37 MB
Description 512-megabit XDRTM DRAM The Rambus XDRTM DRAM device
Datasheet download datasheet TC59YM916BKG32B Datasheet
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Full PDF Text Transcription

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TC59YM916BKG24A,32A,32B,40B,32C,40C TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC OVERVIEW Lead Free www.DataSheet4U.com The Rambus XDRTM DRAM device is a general purpose high-performance memory device suitable for use in a broad range of applications including computer memory, graphics, video, and any other application where high bandwidth and low latency are required. The 512Mb Rambus XDR DRAM device is a CMOS DRAM organized as 32M words by 16 bits. The use of Differential Rambus Signaling Level (DRSL) technology permits 4000/3200/2400 Mb/s transfer rates while using conventional system and board design technologies. XDR DRAM devices are capable of sustained data transfers of 8000/6400/4800 MB/s.
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