* High speed: fmax = 67 MHz (typ.) at VCC = 5 V Low power dissipation: ICC = 2 μA (max) at Ta = 25°C High noise immunity: VNIH = VNIL = 28% VCC (min) Output drive capability: 10 LSTTL loads Symmetrical output impedance: |I
TC74HC112AF Datasheet (248.16 KB)
TC74HC112AF
Toshiba ↗ Semiconductor
248.16 KB
Dual j-k flip flop.
www.DataSheet.co.kr TC74HC112AP/AF/AFN TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic TC74HC112AP,TC74HC112AF,TC74HC112AFN Dual J-K Flip.
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