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Toshiba Electronic Components Datasheet

TC74LCX573FK Datasheet

Low-Voltage Octal D-Type Latch

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TC74LCX573F/FK
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
TC74LCX573F TC74LCX573FK
Low-Voltage Octal D-Type Latch with 5-V Tolerant Inputs and Outputs
The TC74LCX573 is a high-performance CMOS octal D-type latch.
Designed for use in 3.3-V systems, it achieves high-speed operation
while maintaining the CMOS low power dissipation.
The device is designed for low-voltage (3.3 V) VCC applications, but it
could be used to interface to 5-V supply environment for both inputs and
outputs.
This 8-bit D-type latch is controlled by a latch enable input (LE) and
an output enable input ( OE ).
When the OE input is high, the eight outputs are in a high-impedance
state.
All inputs are equipped with protection circuits against static
discharge.
Features
Low-voltage operation: VCC = 1.65 to 3.6 V
High-speed operation: tpd = 8.0 ns (max) (VCC = 3.0 to 3.6 V)
Output current: |IOH|/IOL = 24 mA (min) (VCC = 3.0 V)
Latch-up performance: > ±500 mA
Available in JEITA SOP, VSSOP (US)
Power-down protection provided on all inputs and outputs
Pin and function compatible with the 74 series
(74AC/VHC/HC/F/ALS/LS etc.) 573 type
TC74LCX573F
TC74LCX573FK
Weight
SOP20-P-300-1.27A
VSSOP20-P-0030-0.50
: 0.22 g ( typ.)
: 0.03 g ( typ.)
Note: The Electrical Characteristics of VCC = 1.8 ± 0.15 V is only applicable for products which manufactured
from January 2009 onward.
© 2018
1
Toshiba Electronic Devices & Storage Corporation
Start of commercial production
1994-10
2018-08-02


Toshiba Electronic Components Datasheet

TC74LCX573FK Datasheet

Low-Voltage Octal D-Type Latch

No Preview Available !

Pin Assignment (top view)
IEC Logic Symbol
TC74LCX573F/FK
1
D0 2
D1 3
D2 4
D3 5
D4 6
D5 7
D6 8
D7 9
GND 10
20 VCC
19 Q0
18 Q1
17 Q2
16 Q3
15 Q4
14 Q5
13 Q6
12 Q7
11 LE
(1)
EN
(11)
LE
C1
(2)
D0
1D
(3)
D1
(4)
D2
(5)
D3
(6)
D4
(7)
D5
(8)
D6
(9)
D7
(19) Q0
(18)
Q1
(17)
Q2
(16)
Q3
(15)
Q4
(14)
Q5
(13)
Q6
(12)
Q7
Truth Table
Inputs
OE
LE
D
H
X
X
L
L
X
L
H
L
L
H
H
Outputs
Z
Qn
L
H
X: Don’t care
Z: High impedance
Qn: Q outputs are latched at the time when the LE input is taken to a low logic level.
System Diagram
D0
2
D
D1
3
D
D2
4
D
D3
5
D
D4
6
D
D5
7
D
D6
8
D
D7
9
D
11
LE
1
L
L
L
L
L
L
L
L
19
Q0
18
Q1
17
Q2
16
15
14
13
Q3
Q4
Q5
Q6
12
Q7
© 2018
2
Toshiba Electronic Devices & Storage Corporation
2018-08-02


Part Number TC74LCX573FK
Description Low-Voltage Octal D-Type Latch
Maker Toshiba Semiconductor
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TC74LCX573FK Datasheet PDF






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