TC9447F Datasheet | Toshiba

Features - - - - - - Incorporates a 1-bit Σ∆-type AD converter (two channels). THD: - 82d B, S/N ratio: 95d B (typ.) Incorporates a 1-bit Σ∆-type DA converter (four channels). THD: - 85d B, S/N ratio: 100d B (typ.) A ±10-d B attenuator is built into the DA converter output block (two channels only) Each port has a digital input/output (three lead-type) A built-in self-boot function automatically sets the coefficients and register values at initialization. Boot ROM Data bus Multiplier/adder Accumulator Program ROM Coefficient RAM Coefficient ROM Offset RAM Data RAM Operation speed - - - - : 1024 words × 18 bits : 24 bits : 24 bits × 16 bits + 43 bits → 43 bits : 43 bits (sign extension: 4 bits) : 1024 words × 32 bits : 320 words × 16 bits : 256 words × 16 bits : 64 words × 16 bits : 256 words × 24 bits : 44ns (510-step (approx) operation per cycle at fs = 44.1 k Hz) The DSP block specifications are as follows: Weight: 1.57g (typ.) Interface buffer RAM : 32 words × 16 bits Incorporates data delay RAM. Delay RAM : 4096 words × 16 bits (64 kbits) The microcontroller interface can be selected between Standard Transmission mode and I2C bus mode. CMOS silicon structure supports high speed. The package is a 100-pin flat package. 2002-02-05 Pin Connection 2002-02-05 Block Diagram 2002-02-05 Pin Function Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25~29 30 31 32 33~40 41 42 43 44 45 46 47 Symbol ECKO ECKI GNDX GNDAL AOL VRL VDAL VDAR VRR AOR GNDAR GNDAC AOC AOCT VRC VDAC VRO VRI VDAS VRS AOST AOS GNDAS GND TP0~TP4 VDD VDDR GNDR TP5~TP12 FS CKO0 CKO1 GND TP13 MCK VDD I/O O I ― ― O ― ― ― ― O ― ― O O ― ― O I ― ― O O ― ― O ― ― ― O O O O ― O O ― O I I I I Function Amp output pin for external clock input Amp input pin for external clock input Ground pin for oscillator circuit Ground pin for DAC L channel DAC analog signal output pin (L channel) DAC reference voltage pin (L channel) Power pin for DAC L channel Power pin...