GA1088 Overview
The core of the GA1088 is a Phase-Locked Loop (PLL) that continuously pares the reference clock (REFCLK) to the feedback clock (FBIN), maintaining a zero frequency difference between the two. Since one of the outputs (Q0 Q6) is always connected to FBIN, the PLL keeps the propagation delay between the outputs and the reference clock within 350 ps +500 ps for the GA1088-MC500, and within 350 ps +700 ps for the...
GA1088 Key Features
- Wide frequency range: 18 MHz to 105 MHz
- Output configurations: three outputs at 1/2 fREF three outputs at fREF four outputs at fREF with adjustable phase or two
- Selectable Phase Shift: -2t, -t, 0, and +t (t = 1/fVCO)
- Low output-to-output skew: 150 ps (max) within a group
- Near-zero propagation delay -350 ps + 500 ps (max) or -350 ps +700 ps (max)
- TTL-patible with 30 mA output drive
- 28-pin J-lead surface-mount package