VSC7321 Datasheet, Vitesse Semiconductor

include cyclic replay of frames at a user definable rate - either built by the external CPU directly inside the FIFOs or captures from incoming traffic. A dual MII Manage.

up to 10km 10GbE MAC w/Integrated XAUI SERDES Interface Compliant to IEEE 802.3ae Low Pin Count, low Power OIF SPI-4.2.