W3EG7264S-BD4 unbuffered equivalent, 512mb - 2x32mx72 ddr ecc sdram unbuffered.
Double-data-rate architecture DDR200, DDR266 DDR333
* JEDEC design specifications Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable R.
* This product is under development, is not qualified or characterized and is subject to change without notice.
200 pi.
The W3EG7264S is a 2x32Mx72 Double Data Rate SDRAM memory module based on 512Mb DDR SDRAM components. The module consists of nine 64Mx8 DDR SDRAMs stacked in 54 pin TSOP packages mounted on a 200 pin FR4 substrate. This module is structured as 2 Rank.
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