WED3EG6418S-D4 Datasheet PDF (128MB- 16Mx64 DDR SDRAM UNBUFFERED) | Download White Electronic Designs WED3EG6418S-D4

WED3EG6418S-D4 - 128MB- 16Mx64 DDR SDRAM UNBUFFERED

Description

The WED3DG6418S is a 16Mx64 Double Data Rate SDRAM memory module based on 128Mb DDR SDRAM component.

The module consists of eight 16Mx8 DDR SDRAMs in 66 pin TSOP package mounted on a 200 Pin FR4 substrate.

White Electronic Designs Corp.

Features

Double-data-rate architecture Speed of 100MHz, 133MHz and 166MHz Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2,5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detect JEDEC standard 200 pin SO-DIMM package Power Supply: 2.5V ± 0.25V Synchronous design allows precise cycle control with the use of system clock.

Datasheet Details

Part number	WED3EG6418S-D4
Manufacturer	White Electronic Designs
File Size	115.94 KB
Description	128MB- 16Mx64 DDR SDRAM UNBUFFERED
Datasheet	WED3EG6418S-D4 Datasheet
Additional preview pages of the WED3EG6418S-D4 datasheet.

📁 Similar Datasheet

WED3C755E8M-XBX - RISC MICROPROCESSOR MULTI-CHIP PACKAGE (White Electronic Designs Corporation)

WED3DG64126V-D2 - 1GB - 128M X 64 SDRAM Unbuffered (White Electronic Designs Corporation)

WED3DG64128V-D1 - 1GB - 128M X 64 SDRAM Unbuffered (White Electronic Designs Corporation)

WED3DG6419V-D2 - 128MB - 16Mx64 SDRAM UNBUFFERED (White Electronic Designs Corporation)

WED3DG6466V-D2 - SDRAM UNBUFFERED (White Electronic Designs Corporation)

WED3DG649V-D2 - 64MB- 8M x 64 SDRAM UNBUFFERED (White Electronic Designs Corporation)

WED2CG472512V-D2 - DUAL KEY DIMM SRAM MODULE (White Electronic)

WED2DG472512V-D2 - DUAL KEY DIMM (White Electronic)

WED2DL32512V - 512Kx32 Synchronous Pipeline Burst SRAM (White Electronic)

WED2EG472512V-D2 - DUAL KEY DIMM (White Electronic)

Full PDF Text Transcription

Click to expand full text

www.datasheet4u.com WED3EG6418S-D4 FINAL 128MB- 16Mx64 DDR SDRAM UNBUFFERED W/PLL FEATURES Double-data-rate architecture Speed of 100MHz, 133MHz and 166MHz Bi-directional data strobes (DQS) Differential clock inputs (CK & CK#) Programmable Read Latency 2,2,5 (clock) Programmable Burst Length (2,4,8) Programmable Burst type (sequential & interleave) Edge aligned data output, center aligned data input Auto and self refresh Serial presence detect JEDEC standard 200 pin SO-DIMM package Power Supply: 2.5V ± 0.25V Synchronous design allows precise cycle control with the use of system clock. Data I/O transactions are possible on both edges and Burst Lenths allow the same device to be useful for a variety of high bandwidth, high performance memory system applications.

Published: Apr 7, 2009 |