The following content is an automatically extracted verbatim text
from the original manufacturer datasheet and is provided for reference purposes only.
View original datasheet text
PRELIMINARY W986432DH 512K × 4 BANKS × 32 BITS SDRAM
GENERAL DESCRIPTION
W986432DH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words × 4 banks × 32 bits. Using pipelined architecture and 0.175 µm process technology, W986432DH delivers a data bandwidth of up to 800M bytes per second (5). For different application, W986432DH is sorted into four speed grades: -5, -55, -6, -7,-8. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE command. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle.