W986432DH
W986432DH is 512K 4 BANKS 32 BITS SDRAM manufactured by Winbond.
DESCRIPTION
W986432DH is a high-speed synchronous dynamic random access memory (SDRAM), organized as 512K words × 4 banks × 32 bits. Using pipelined architecture and 0.175 µm process technology, W986432DH delivers a data bandwidth of up to 800M bytes per second (5). For different application, W986432DH is sorted into four speed grades: -5, -55, -6, -7,-8. Accesses to the SDRAM are burst oriented. Consecutive memory location in one page can be accessed at a burst length of 1, 2, 4, 8 or full page when a bank and row is selected by an ACTIVE mand. Column addresses are automatically generated by the SDRAM internal counter in burst operation. Random column read is also possible by providing its address at each clock cycle. The multiple bank nature enables interleaving among internal banks to hide the precharging time. By having a programmable Mode Register, the system can change burst length, latency cycle, interleave or sequential burst to maximize its performance. W986432DH is ideal for main memory in high performance applications.
FEATURES
- -
- -
- -
- -
- -
- -
- 3.3V ±0.3V power supply 524288 words × 4 banks × 32 bits organization Auto Refresh and Self Refresh CAS latency: 2 and 3 Burst Length: 1, 2, 4, 8, and full page Sequential and Interleave burst Burst read, single write operation Byte data controlled by DQM Power-down Mode Auto-precharge and controlled precharge 4K refresh cycles/64 m S Interface: LVTTL Packaged in 86-pin TSOP II, 400 mil
- 0.50
-1-
Publication Release Date: May 2000 Revision A0
PRELIMINARY W986432DH 512K × 4 BANKS × 32 BITS SDRAM
PIN CONFIGURATION
DQM1 DQM3 DQ15 DQ14 DQ13 DQ12 DQ11 DQ10 DQ31 DQ30 DQ29 DQ28 DQ27 DQ26 DQ25 DQ24 45 42 DQ23 VCCQ VCCQ VCCQ VCCQ VSSQ VSSQ VSSQ...