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XC18V512 - In-System Programmable Configuration PROMs

Download the XC18V512 datasheet PDF. This datasheet also covers the XC18V00 variant, as both devices belong to the same in-system programmable configuration proms family and are provided as variant models within a single manufacturer datasheet.

General Description

Xilinx introduces the XC18V00 series of in-system programmable configuration PROMs (Figure 1).

Key Features

  • In-System Programmable 3.3V PROMs for Configuration of Xilinx FPGAs.
  • Endurance of 20,000 Program/Erase Cycles.
  • Program/Erase Over Full Industrial Voltage and Temperature Range (.
  • 40°C to +85°C).
  • IEEE Std 1149.1 Boundary-Scan (JTAG) Support.
  • JTAG Command Initiation of Standard FPGA Configuration.
  • Simple Interface to the FPGA.
  • Cascadable for Storing Longer or Multiple Bitstreams Product Specification.
  • Low-Power Advanc.

📥 Download Datasheet

Note: The manufacturer provides a single datasheet file (XC18V00_Xilinx.pdf) that lists specifications for multiple related part numbers.

Full PDF Text Transcription (Reference)

The following content is an automatically extracted verbatim text from the original manufacturer datasheet and is provided for reference purposes only.

View original datasheet text
25 R XC18V00 Series In-System-Programmable Configuration PROMs DS026 (v6.1) February 5, 2019 0 Features • In-System Programmable 3.3V PROMs for Configuration of Xilinx FPGAs ♦ Endurance of 20,000 Program/Erase Cycles ♦ Program/Erase Over Full Industrial Voltage and Temperature Range (–40°C to +85°C) • IEEE Std 1149.1 Boundary-Scan (JTAG) Support • JTAG Command Initiation of Standard FPGA Configuration • Simple Interface to the FPGA • Cascadable for Storing Longer or Multiple Bitstreams Product Specification • Low-Power Advanced CMOS FLASH Process • Dual Configuration Modes ♦ Serial Slow/Fast Configuration (up to 33 MHz) ♦ Parallel (up to 264 Mb/s at 33 MHz) • 5V-Tolerant I/O Pins Accept 5V, 3.3V and 2.5V Signals • 3.3V or 2.