XC7336 Datasheet - Xilinx

36-Macrocell CMOS EPLD

* High-performance Erasable Programmable Logic Devices (EPLDs)

* 5 / 7.5 ns pin-to-pin speeds on all fast inputs

* Up to 167 MHz maximum clock frequency

* Advanced Dual-Block architecture

* Fast Function Blocks

* High-Density Function Blocks (XC7354, X

XC7336

Xilinx

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36-macrocell cmos epld.

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XC7336 36-Macrocell CMOS EPLD Xilinx