XC9536 Datasheet - Xilinx

XC9536 In-System Programmable CPLD

XC9536 Features

* 5 ns pin-to-pin logic delays on all pins fCNT to 100 MHz 36 macrocells with 800 usable gates Up to 34 user I/O pins 5 V in-system programmable (ISP) - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperatu

XC9536 General Description

The XC9536 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of two 36V18 Function Blocks, providing 800 usable gates with propagation delays of 5 ns. See Figure 2 for the architecture overview. 0 50 Clock.

XC9536 Datasheet (61.42 KB)

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XC9536

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Xilinx

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61.42 KB

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Xc9536 in-system programmable cpld.

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XC9536 XC9536 In-System Programmable CPLD Xilinx

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XC9536 Features

XC9536 General Description

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