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XCR22LV10-10PC28I Datasheet Preview

XCR22LV10-10PC28I Datasheet

TotalCMOS/ Universal PLD Device

No Preview Available !

0
R XCR22LV10: 3V Zero Power,
TotalCMOS, Universal PLD Device
DS047 (v1.1) February 10, 2000
0 0* Product Specification
Features
• Industry's first TotalCMOS™ SPLD - both CMOS
design and process technologies
• Fast Zero Power (FZP™) design technique provides
ultra-low power and high speed
- Static current of less than 45 µA
- Dynamic current substantially below that of
competing devices
- Pin-to-pin delay of only 10 ns
• True Zero Power device with no turbo bits or power
down schemes
• Function/JEDEC map compatible with Bipolar,
UVCMOS, EECMOS 22V10s
• Multiple packaging options featuring PCB-friendly
flow-through pinouts (SOL and TSSOP)
- 24-pin TSOIC–uses 93% less in-system space than
a 28-pin PLCC
- 24-pin SOIC
- 28-pin PLCC with standard JEDEC pinout
• Available in commercial and industrial operating ranges
• Supports mixed voltage systems—5V tolerant I/Os
• Advanced 0.5µ E2CMOS process
• 1000 erase/program cycles guaranteed
• 20 years data retention guaranteed
• Varied product term distribution with up to 16 product
terms per output for complex functions
• Programmable output polarity
• Synchronous preset/asynchronous reset capability
• Security bit prevents unauthorized access
• Electronic signature for identification
• Design entry and verification using industry standard
CAE tools
• Reprogrammable using industry standard device
programmers
Description
The XCR22LV10 is the first SPLD to combine high perfor-
mance with low power, without the need for "turbo bits" or
other power down schemes. To achieve this, Xilinx has
used their FZP design technique, which replaces conven-
tional sense amplifier methods for implementing product
terms (a technique that has been used in PLDs since the
bipolar era) with a cascaded chain of pure CMOS gates.
This results in the combination of low power and high
speed that has previously been unattainable in the PLD
arena. For 5V operation, Xilinx offers the XCR22V10 that
offers high speed and low power in a 5V implementation.
The XCR22LV10 uses the familiar AND/OR logic array
structure, which allows direct implementation of
sum-of-products equations. This device has a programma-
ble AND array which drives a fixed OR array. The OR sum
of products feeds an "Output Macro Cell" (OMC), which can
be individually configured as a dedicated input, a combina-
torial output, or a registered output with internal feedback.
Functional Description
The XCR22LV10 implements logic functions as
sum-of-products expressions in a programmable-
AND/fixed-OR logic array. User-defined functions are cre-
ated by programming the connections of input signals into
the array. User-configurable output structures in the form of
I/O macrocells further increase logic flexibility (Figure 1).
DS047 (v1.1) February 10, 2000
www.xilinx.com
1-800-255-7778
1




Xilinx

XCR22LV10-10PC28I Datasheet Preview

XCR22LV10-10PC28I Datasheet

TotalCMOS/ Universal PLD Device

No Preview Available !

.
CLK/I0 1
0 3 4 7 8 11 12 15 16 19 20 23 24 27 28 31 32 35 36 39 40 43
0
1
9
10
20
I1 2
21
I2 3
33
34
I3 4
48
49
I4 5
65
66
I5 6
82
83
Programmable connection.
I6 7
97
98
110
I7 8
111
121
I8 9
122
130
I9 10
I10 11
131
GND 12
NOTE:
0 3 4 7 8 11 12 15 16 19 20 23 24 27 28 31 32 35 36 39 40 43
AR
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
1
DAR Q
Q
SP
10
11
00
01
0
SP 1
Figure 1: XCR22LV10 Logic Diagram
24 VCC
23 F9
22 F8
21 F7
20 F6
19 F5
18 F4
17 F3
16 F2
15 F1
14 F0
13 I11
SP00059
DS047 (v1.1) February 10, 2000
www.xilinx.com
1-800-255-7778
2


Part Number XCR22LV10-10PC28I
Description TotalCMOS/ Universal PLD Device
Maker Xilinx
Total Page 14 Pages
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