XCR5128
Features
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- Industry's first Total CMOS™ PLD
- both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and very high speed IEEE 1149.1-pliant, JTAG Testing Capability
- Four pin JTAG interface (TCK, TMS, TDI, TDO)
- IEEE 1149.1 TAP Controller
- JTAG mands include: Bypass, Sample/Preload, Extest, Usercode, Idcode, High Z 5V, In-System Programmable (ISP) using the JTAG interface
- On-chip supervoltage generation
- ISP mands include: Enable, Erase, Program, Verify
- Supported by multiple ISP programming platforms High speed pin-to-pin delays of 7.5 ns Ultra-low static power of less than 100 µA 100% routable with 100% utilization while all pins and all macrocells are fixed Deterministic timing model that is extremely simple to use Four clocks available Programmable clock polarity at every macrocell Support for asynchronous clocking Innovative XPLA™ architecture bines high speed with extreme...
