XCR5128C Overview
The XCR5128C CPLD (plex Programmable Logic Device) is a member of the CoolRunner® family of CPLDs from Xilinx. These devices bine high speed and zero power in a 128 macrocell CPLD. With the FZP design technique, the XCR5128C offers true pin-to-pin speeds of 7.5 ns, while simultaneously delivering power that is less than 100 µA at standby without the need for “turbo bits” or other power down schemes.
XCR5128C Key Features
- Industry's first TotalCMOS™ PLD
- both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and very high
- On-chip supervoltage generation
- ISP mands include: Enable, Erase, Program, Verify
- Supported by multiple ISP programming platforms
- Four pin JTAG interface (TCK, TMS, TDI, TDO)
- JTAG mands include: Bypass, Idcode High speed pin-to-pin delays of 7.5 ns Ultra-low static power of less than 100 µA 100