XCR5128 Key Features
- Industry's first TotalCMOS™ PLD
- both CMOS design and process technologies Fast Zero Power (FZP™) design technique provides ultra-low power and very high
- Four pin JTAG interface (TCK, TMS, TDI, TDO)
- IEEE 1149.1 TAP Controller
- JTAG mands include: Bypass, Sample/Preload, Extest, Usercode, Idcode, HighZ 5V, In-System Programmable (ISP) using the J
- On-chip supervoltage generation
- ISP mands include: Enable, Erase, Program, Verify
- Programmable 3-state buffer
- Asynchronous macrocell register preset/reset Programmable global 3-state pin facilitates "bed of nails" testing without