- Single 3.3V ±0.3V power supply - Maximum clock frequency : - 60:166MHz<3-3-3>/-70:143MHz<3-3-3>/-75:133MHz<3-3-3> - Fully synchronous operation referenced to clock risi.

A3V28S40JTP is organized as 4-bank x 2,097,154-word x 16-bit Synchronous DRAM with LVTTL interface. All inputs and outputs are referenced to the rising edge of CLK. A3V28S40JTP achieve very high speed data rates up to 166MHz, and are suitable for mai.

A3V28S40FTP

A3V28S30FTP

A3V56S30FTP

A3V56S30GTP

A3V56S40FTP

A3V56S40GTP

A3V64S40GTP

A3-44PA-2SV

A3-xxxA-2xx

A3010

A301D

A301V

A3046