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AT84AS004 Datasheet Preview

AT84AS004 Datasheet

10-bit 2 Gsps ADC

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AT84AS004
10-bit 2 Gsps ADC With1:4 DMUX
Datasheet
Features
10-bit Resolution
2 Gsps Sampling Rate
Selectable 1:2 or 1:4 Demultiplexed Output
500 mVpp Differential 100or Single-ended 50Analog Input
100Differential or Single-ended 50Clock Input
LVDS Output Compatibility
Functions:
– ADC Gain Adjust
– Sampling Delay Adjust
– 1:4 Demultiplexed Simultaneous or Staggered Digital Outputs
– Data Ready Output with Asynchronous Reset
– Out-of-range Output Bit (11th Bit)
Power Consumption: 6.5W
Power Supplies: -5V, -2.2V, 3.3V and VPLUSD Output Power Supply
Package
– Cavity Down EBGA 317 (Enhanced Ball Grid Array)
– 25 × 35 mm Dimensions
Performances
• 3 GHz Full Power Analog Input Bandwidth
• -0.5 dB Gain Flatness from DC up to 1.5 GHz
• Single-tone Performance at Fs = 2 Gsps, Full First and Second Nyquist (- 1 dBFS)
– ENOB = 7.8 Effective Bits, FIN = 1000 MHz
– SNR = 51 dBc, SFDR = -55 dBc, FIN = 1000 MHz
– ENOB = 7.5 Effective Bits, FIN = 2 GHz
– SNR = 50 dBc, SFDR = -54 dBc, FIN = 2 GHz
• Dual-tone Performance (IMD3) at Fs = 2 Gsps (-7 dBFS Each Tone)
– Fin1 = 945 MHz, Fin2 = 955 MHz: IMD3 = -60 dBFS
– Fin1 = 1545 MHz, Fin2 = 1555 MHz: IMD3 = -60 dBFS
Screening
• Temperature Range:
– Tamb > 0°C; TJ < 90°C (Commercial C Grade)
– Tamb > -40°C; TJ < 110°C (Industrial V Grade)
e2v semiconductors SAS 2007
Visit our website: www.e2v.com
for the latest version of the datasheet
0829E–BDC–10/07




e2v

AT84AS004 Datasheet Preview

AT84AS004 Datasheet

10-bit 2 Gsps ADC

No Preview Available !

AT84AS004
Applications
• Direct RF Down Conversion
• Broadband Digital Receivers
• Test Instrumentation
• High Speed Data Acquisition
• High Energy Physics
1. Description
The AT84AS004 combines a 10-bit 2 Gsps analog-to-digital converter with a 1:4 DMUX, designed for
accurate digitization of broadband signals in either first or second Nyquist zone. It features 7.8 Effective
Number of Bits (ENOB) and -55 dBFS Spurious Free Dynamic Range (SFDR) at 2 Gsps over the full first
Nyquist zone and 7.5-bit with 54 dB SFDR over full second Nyquist.
The 1:4 demultiplexed digital outputs are LVDS logic compatible, allowing easy interfacing with standard
FPGAs or DSPs. The AT84AS004 operates at up to 2 Gsps.
The AT84AS004 comes in a 25 × 35 mm EBGA317 package. This package has the same TCE as FR4
boards, offering excellent reliability when subjected to large thermal shocks.
2. Block Diagram
Figure 2-1. Block Diagram
CLK/CLKN
2
SDA
VIN
VINN
S/H
Demultiplexer
1:2 or 1:4
2
0829E–BDC–10/07
GA
B/GB
SLEEP
STAGG
RS
DRTYPE
e2v semiconductors SAS 2007


Part Number AT84AS004
Description 10-bit 2 Gsps ADC
Maker e2v
Total Page 30 Pages
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