ADS5404 Datasheet | Texas Instruments

FEATURES - Dual Channel - 12-Bit Resolution - Maximum Clock Rate: 500 Msps - Low Swing Fullscale Input: 1.0 Vpp - Analog Input Buffer with High Impedance Input - Input Bandwidth (3 d B): >1.2 GHz - Data Output Interface: DDR LVDS - 196-Pin BGA Package (12x12mm) - Power Dissipation: 910 m W/ch - Performance at fin = 230 MHz IF - SNR: 60.6 d BFS - SFDR: 77 d Bc - Performance at fin = 700 MHz IF - SNR: 59.4 d BFS - SFDR: 70 d Bc APPLICATIONS - Test and Measurement Instrumentation - Ultra-Wide Band Software Defined Radio - Data Acquisition - Power Amplifier Linearization - Signal Intelligence and Jamming - Radar and Satellite Systems - Microwave Receivers DESCRIPTION The ADS5404 is a high linearity dual channel 12-bit, 500 MSPS analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and outstanding spurious-free dynamic range over a large input-frequency range. The device is available in a 196-pin BGA package and is specified over the full industrial temperature range (- 40°C to 85°C). INA CLKIN SYNCIN Clk Buffer 12bit 500Msps Digital Block DA[11 :0] DACLK 12bit 500Msps Digital Block DB[11 :0] DBCLK Device Part No. ADS5402 ADS5401 ADS5404 ADS5403 ADS5407 ADS5409 Number of Channels 2 1 2 1 2...