ADS5407 Datasheet | Texas Instruments

FEATURES - Dual Channel - 12-Bit Resolution - Maximum Clock Rate: 500 Msps - Low Swing Fullscale Input: 1.25 Vpp - Analog Input Buffer with High Impedance Input - Input Bandwidth (3d B): >1.0 GHz - Data Output Interface: DDR LVDS - Optional 2x Decimation with Low Pass or High Pass Filter - 196-Pin BGA Package (12 x 12mm) DESCRIPTION The ADS5407 is a high linearity dual channel 12-bit, 500 MSPS analog-to-digital converter (ADC) easing front end filter design for wide bandwidth receivers. The analog input buffer isolates the internal switching of the on-chip track-and-hold from disturbing the signal source as well as providing a high-impedance input. Optionally the output data can be decimated by two. Designed for high SFDR, the ADC has low-noise performance and outstanding spurious-free dynamic range over a large input-frequency range. The device is available in a 196 pin BGA package and is specified over the full industrial temperature range (- 40°C to 85°C). APPLICATIONS - Test and Measurement Instrumentation - Ultra-Wide Band Software Defined Radio - Data Acquisition - Power Amplifier Linearization - Signal Intelligence and Jamming - Radar and Satellite Systems - Microwave Receivers CLKIN SYNC Clk Buffer 12bit 500Msps Digital Block DA[11:0] DACLK KEY SPECIFCATIONS - Power Dissipation: 675 m W/ch (Auto Correction Disabled) - Spectral Performance at f IN = 230 MHz IF - SNR: 63.7 d BFS - SFDR: - 77 d Bc (Auto Correction Disabled off) - 75 d Bc (Auto Correction Disabled on) - Spectral Performance at f IN = 450 MHz IF - SNR: 63.6 d BFS - SFDR: - 77 d Bc (Auto Correction Disabled off) - 75 d Bc (Auto Correction Disabled...