ADS6222 Datasheet | Texas Instruments

ADS6225, ADS6224 ADS6223, ADS6222 .ti. SLAS543B - MAY 2007 - REVISED JANUARY 2014 DUAL CHANNEL, 12-BIT, 125/105/80/65 MSPS ADC WITH SERIAL LVDS INTERFACE Check for Samples: ADS6225, ADS6224, ADS6223, ADS6222 Features - Maximum Sample Rate: 125 MSPS - 12-Bit Resolution with No Missing Codes - Simultaneous Sample and Hold - 3.5 d B Coarse Gain and up to 6 d B Programmable Fine Gain for SFDR/SNR Trade Off - Serialized LVDS Outputs with Programmable Internal Termination Option - Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 m Vpp - Internal Reference with External Reference Support - No External Decoupling Required for References - 3.3-V Analog and Digital Supply - 48 QFN Package (7 mm × 7 mm) - Pin patible 14-Bit Family (ADS624X SLAS542) - Feature patible Quad Channel Family (ADS644X - SLAS531 and ADS642X - SLAS532) APPLICATIONS - Base-Station IF Receivers - Diversity Receivers - Medical Imaging - Test Equipment Table 1. ADS62XX Dual Channel Family ADS624X 14...