ADS6222 Key Features
- Maximum Sample Rate: 125 MSPS
- 12-Bit Resolution with No Missing Codes
- Simultaneous Sample and Hold
- 3.5 dB Coarse Gain and up to 6 dB
- Serialized LVDS Outputs with Programmable Internal Termination Option
- Supports Sine, LVCMOS, LVPECL, LVDS Clock Inputs and Amplitude Down to 400 mVpp
- Internal Reference with External Reference Support
- No External Decoupling Required for References
- 3.3-V Analog and Digital Supply
- 48 QFN Package (7 mm × 7 mm)