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CD54ACT02 - QUADRUPLE 2-INPUT POSITIVE-NOR GATES

General Description

or Y = A + B in positive logic.

E Tube CD74ACT02E CD74ACT02E Tube 55°C to 125°C SOIC

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Full PDF Text Transcription for CD54ACT02 (Reference)

Note: Below is a high-fidelity text extraction (approx. 800 characters) for CD54ACT02. For precise diagrams, and layout, please refer to the original PDF.

CD54ACT02, CD74ACT02 QUADRUPLE 2-INPUT POSITIVE-NOR GATES D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With Significantly Reduced Power Consumptio...

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d of Bipolar F, AS, and S, With Significantly Reduced Power Consumption D Balanced Propagation Delays D ±24-mA Output Drive Current – Fanout to 15 F Devices D SCR-Latchup-Resistant CMOS Process and Circuit Design D Exceeds 2-kV ESD Protection Per MIL-STD-883, Method 3015 SCHS309B – JANUARY 2001 – REVISED MAY 2002 CD54ACT02 . . . F PACKAGE CD74ACT02 . . . E OR M PACKAGE (TOP VIEW) 1Y 1A 1B 2Y 2A 2B GND 1 2 3 4 5 6 7 14 VCC 13 4Y 12 4B 11 4A 10 3Y 9 3B 8 3A description The ’ACT02 devices contain four independent 2-input NOR gates that perform the Boolean function Y = A S B or Y = A + B in positive logic.

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