GATES Datasheet | Specifications & PDF Download

SN74HC00, SN54HC00 SCLS181H – DECEMBER 1982 – REVISED AUGUST 2021 SNx4HC00 Quadruple 2-Input NAND Gates 1 Features • Buffered inputs • Wide operating

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Product Folder Order Now Technical Documents Tools & Software Support & Community SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D –

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Product Folder Order Now Technical Documents Tools & Software Support & Community SN5400, SN54LS00, SN54S00 SN7400, SN74LS00, SN74S00 SDLS025D –

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PACKAGE OPTION ADDENDUM www.ti.com 15-Apr-2017 PACKAGING INFORMATION Orderable Device SN5401J SN54LS01J SN54LS01J SNJ5401J SNJ5401J SNJ5401W SNJ54

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CDx4HCT20 Dual 4-Input NAND Gates CD74HCT20, CD54HCT20 SCHS417 – JUNE 2020 1 Features 3 Description • LSTTL input logic compatible – VIL(max) = 0.

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AT40K05, AT40K10, AT40K20, AT40K40 5K – 50K Gates Coprocessor FPGA with FreeRAM™ Features DATASHEET  Ultra high performance  System speeds to 100

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www.ti.com CD74HCT00, CD54HCT00 CD74SHCHCST30980,–CJADN5U4AHRYC2T00201 SCHS398 – JANUARY 2021 CDx4HCT00 Quadruple 2-Input NAND Gates with TTL-Compat

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Unit: mm 19.20 20.32 Max 14 8 6.30 7.40 Max 1 2.39 Max 1.30 7 7.62 0.51 Min 2.54 Min 5.06 Max 2.54 ± 0.25 0.48 ± 0.10 0.25 – 0.05 0° – 15° + 0

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CDx4HCT20 Dual 4-Input NAND Gates CD74HCT20, CD54HCT20 SCHS417 – JUNE 2020 1 Features 3 Description • LSTTL input logic compatible – VIL(max) = 0.

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Features • Multichip Module Containing Field Programmable System Level Integrated Circuit (FPSLIC®) and Secure Configuration EEPROM Memory • 512 Kbits

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HD74LS00 Quadruple 2-Input NAND Gates Features • Ordering Information Part Name Package Type Package Code Package (Previous Code) Abbreviation HD

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AT40K05, AT40K10, AT40K20, AT40K40 5K – 50K Gates Coprocessor FPGA with FreeRAM™ Features DATASHEET  Ultra high performance  System speeds to 100

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CD54ACT00, CD74ACT00 QUADRUPLE 2-INPUT POSITIVE-NAND GATES D Inputs Are TTL-Voltage Compatible D Speed of Bipolar F, AS, and S, With Significantly Re

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Data sheet acquired from Harris Semiconductor SCHS057C – Revised September 2003 The CD4073B, CD4081B, and CD4082B types are supplied in 14-lead hermet

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Features • Multichip Module Containing Field Programmable System Level Integrated Circuit (FPSLIC®) and Secure Configuration EEPROM Memory • 512 Kbits

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Features • Ultra High Performance – System Speeds to 100 MHz – Array Multipliers > 50 MHz – 10 ns Flexible SRAM – Internal Tri-state Capability in Eac

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www.DataSheet4U.com

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• Inputs Are TTL-Voltage Compatible • Flow-Through Architecture Optimizes PCB Layout • Center-Pin VCC and GND Configurations Minimize High-Speed Switc

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SN54AC00, SN74AC00 SCAS524F – AUGUST 1995 – REVISED JULY 2024 SNx4AC00 Quadruple 2-Input Positive-NAND Gates 1 Features • 2V to 6V VCC operation • In

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HD74LS86 Quadruple 2-input Exclusive-OR Gates Features • Ordering Information Part Name Package Type Package Code Package (Previous Code) Abbrevia

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