CD54HCT00J
Features
- LSTTL input logic patible
- VIL(max) = 0.8 V, VIH(min) = 2 V
- CMOS input logic patible
- II ≤ 1 µA at VOL, VOH
- Buffered inputs
- 4.5 V to 5.5 V operation
- Wide operating temperature range:
- 55°C to +125°C
- Supports fanout up to 10 LSTTL loads
- Significant power reduction pared to LSTTL logic ICs
2 Applications
- Alarm / tamper detect circuit
- S-R latch
1A
1B
1Y
2A
2B
2Y
3 Description
This device contains four independent 2-input NAND gates. Each gate performs the Boolean function Y = A
- B in positive logic.
Device Information
PART NUMBER
PACKAGE(1)
BODY SIZE (NOM)
CD74HCT00M
SOIC (14)
8.65 mm × 3.90 mm
CD74HCT00E
PDIP (14)
19.30 mm × 6.40 mm
CDIP...
