CD54HCT10 gates equivalent, triple 3-input nand gates.
* LSTTL input logic compatible
– VIL(max) = 0.8 V, VIH(min) = 2 V
* CMOS input logic compatible
– II ≤ 1 µA at VOL, VOH
* Buff.
* Alarm / tamper detect circuit
* S-R latch
3 Description
This device contains three independent 3-input NAND .
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