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CD54HCT132J - Quadruple 2-Input NAND Gates

This page provides the datasheet information for the CD54HCT132J, a member of the CD54HCT132 Quadruple 2-Input NAND Gates family.

Datasheet Summary

Description

This device contains four independent 2-input NAND gates.

B in positive logic.

Features

  • LSTTL input logic compatible.
  • VIL(max) = 0.8 V, VIH(min) = 2 V.
  • CMOS input logic compatible.
  • II ≤ 1 µA at VOL, VOH.
  • Buffered inputs.
  • 4.5 V to 5.5 V operation.
  • Wide operating temperature range:.
  • 55°C to +125°C.
  • Supports fanout up to 10 LSTTL loads.
  • Significant power reduction compared to LSTTL logic ICs 2.

📥 Download Datasheet

Datasheet preview – CD54HCT132J

Datasheet Details

Part number CD54HCT132J
Manufacturer Texas Instruments
File Size 0.99 MB
Description Quadruple 2-Input NAND Gates
Datasheet download datasheet CD54HCT132J Datasheet
Additional preview pages of the CD54HCT132J datasheet.

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Full PDF Text Transcription

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www.ti.com CD74HCT132, CD54HCT132 CD74HSCCTH1S33299, C– JDA5N4UHARCYT2103221 SCHS399 – JANUARY 2021 CDx4HCT132 Quadruple 2-Input NAND Gates with TTL-Compatible Schmitt-Trigger Inputs 1 Features • LSTTL input logic compatible – VIL(max) = 0.8 V, VIH(min) = 2 V • CMOS input logic compatible – II ≤ 1 µA at VOL, VOH • Buffered inputs • 4.5 V to 5.
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