CD54HCT257 Datasheet | Texas Instruments

Data sheet acquired from Harris Semiconductor SCHS171D November 1997 - Revised October 2003 CD54HC257, CD74HC257, CD54HCT257, CD74HCT257 High-Speed CMOS Logic Quad 2-Input Multiplexer with Three-State Non-Inverting Outputs [ /Title (CD74 HC257 , CD74 HCT25 7) /Subject (High Speed CMOS Logic Quad 2-Input Multiplexer Features - Buffered Inputs - Typical Propagation Delay ( In to Output ) = 12ns at VCC = 5V, CL = 15p F, TA = 25o C - Fanout (Over Temperature Range) - Standard Outputs - - - 10 LSTTL Loads - Bus Driver Outputs - - . . . 15 LSTTL Loads - Wide Operating Temperature Range . . . -55o C to 125o C - Balanced Propagation Delay and Transition Times - Significant Power Reduction pared to LSTTL Logic ICs - HC Types - 2V to 6V Operation - High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V - HCT Types - 4.5V to 5.5V Operation - Direct LSTTL Input Logic patibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input patibility, Il ≤ 1µA at VOL, VOH Description The ’HC257 and ’HCT257 are quad 2-input multiplexers which select four bits of data from two sources under the control of a mon Select Input (S). The Output Enable input (OE) is active LOW. When OE is HIGH, all of the outputs (1Y-4Y) are in the high impedance state regardless of all other input conditions. Moving data from two groups of registers to four mon output buses is a mon use of the 257. The state of the Select input determines the particular register from which the data es. It can also be used as a function generator. Ordering...