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CD74HCT564 Datasheet Preview

CD74HCT564 Datasheet

Octal D-Type Flip-Flop

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Data sheet acquired from Harris Semiconductor
SCHS188C
January 1998 - Revised April 2004
CD54/74HC534, CD54/74HCT534,
CD54/74HC564, CD54/74HCT564
High-Speed CMOS Logic Octal D-Type Flip-Flop,
Three-State Inverting Positive-Edge Triggered
[ /Title
(CD74
HC534
,
CD74
HCT53
4,
CD74
HC564
,
CD74
HCT56
Features
Description
• Buffered Inputs
• Common Three-State Output-Enable Control
• Three-State Outputs
• Bus Line Driving Capability
Typical Propagation Delay =
CL = 15pF, TA = 25oC (Clock
13ns at VCC
to Output)
=
5V,
• Fanout (Over Temperature Range)
- Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
- Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55oC to 125oC
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL
Logic ICs
• HC Types
- 2V to 6V Operation
- High Noise Immunity: NIL = 30%, NIH = 30% of VCC
at VCC = 5V
• HCT Types
- 4.5V to 5.5V Operation
- Direct LSTTL Input Logic Compatibility,
VIL= 0.8V (Max), VIH = 2V (Min)
- CMOS Input Compatibility, Il 1µA at VOL, VOH
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are high speed
Octal D-Type Flip-Flops manufactured with silicon gate CMOS
technology. They possess the low power consumption of stan-
dard CMOS integrated circuits, as well as the ability to drive
15 LSTTL loads. Due to the large output drive capability and
the three-state feature, these devices are ideally suited for
interfacing with bus lines in a bus organized system. The two
types are functionally identical and differ only in their pinout
arrangements.
The ’HC534, ’HCT534, ’HC564, and ’HCT564 are positive
edge triggered flip-flops. Data at the D inputs, meeting the
setup and hold time requirements, are inverted and trans-
ferred to the Q outputs on the positive going transition of the
CLOCK input. When a high logic level is applied to the OUT-
PUT ENABLE input, all outputs go to a high impedance state,
regardless of what signals are present at the other inputs and
the state of the storage elements.
The HCT logic family is speed, function, and pin compatible
with the standard LS logic family.
Ordering Information
PART NUMBER
CD54HC534F3A
CD54HC564F3A
CD54HCT534F3A
CD54HCT564F3A
CD74HC534E
CD74HC564E
CD74HC564M
CD74HC564M96
CD74HCT534E
CD74HCT564E
CD74HCT564M
TEMP. RANGE
(oC)
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
-55 to 125
PACKAGE
20 Ld CERDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld CERDIP
20 Ld PDIP
20 Ld PDIP
20 Ld SOIC
20 Ld SOIC
20 Ld PDIP
20 Ld PDIP
20 Ld SOIC
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright © 2004, Texas Instruments Incorporated
1




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CD74HCT564 Datasheet Preview

CD74HCT564 Datasheet

Octal D-Type Flip-Flop

No Preview Available !

CD54/74HC534, CD54/74HCT534, CD54/74HC564, CD54/74HCT564
Pinouts
CD54HC534, CD54HCT534
(CERDIP)
CD74HC534, CD74HCT534
(PDIP)
TOP VIEW
OE 1
Q0 2
D0 3
20 VCC
19 Q7
18 D7
D1 4
17 D6
Q1 5
16 Q6
Q2 6
15 Q5
D2 7
14 D5
D3 8
13 D4
Q3 9
GND 10
12 Q4
11 CP
Functional Diagram
CD54HC564, CD54HCT564
(CERDIP)
CD74HC564, CD74HCT564
(PDIP, SOIC)
TOP VIEW
OE 1
D0 2
D1 3
20 VCC
19 Q0
18 Q1
D2 4
17 Q2
D3 5
16 Q3
D4 6
15 Q4
D5 7
14 Q5
D6 8
13 Q6
D7 9
GND 10
12 Q7
11 CP
D0
D1
D2
D3
D4
D5
D6
D7
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
DQ
CP
CP
OE
Q0
Q1
Q2
Q3
Q4
Q5
Q6
O7
TRUTH TABLE
INPUTS
OE
CP
Dn
L
H
L
L
L
L
X
H
X
X
H = High Level (Steady State)
L = Low Level (Steady State)
X= Don’t Care
= Transition from Low to High Level
Z = High Impedance State
OUTPUT
Qn
L
H
No Change
Z
2


Part Number CD74HCT564
Description Octal D-Type Flip-Flop
Maker etcTI
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CD74HCT564 Datasheet PDF






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