DP83630SQ Overview
Key Features
- IEEE 1588 V1 and V2 Supported
- UDP/IPv4, UDP/IPv6, and Layer2 Ethernet Packets Supported
- IEEE 1588 Clock Synchronization
- Selectable Frequency Synchronized Low Jitter Clock Output
- Timestamp Resolution of 8 ns
- Allows Sub 10 ns Synchronization to Master Reference
- 12 IEEE 1588 GPIOs for Trigger or Capture
- Deterministic, Low Transmit and Receive Latency
- Dynamic Link Quality Monitoring
- TDR Based Cable Diagnostic and Cable Length Detection
