Datasheet Summary
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SNLS067E
- JANUARY 2001
- REVISED APRIL 2013
DS90LV001 800 Mbps LVDS Buffer
Check for Samples: DS90LV001
Features
- 2 Single +3.3 V Supply
- LVDS Receiver Inputs Accept LVPECL Signals
- TRI-STATE Outputs
- Receiver Input Threshold < ±100 mV
- Fast Propagation Delay of 1.4 ns (Typ)
- Low Jitter 800 Mbps Fully Differential Data
Path
- 100 ps (Typ) of pk-pk Jitter with PRBS = 223- 1
Data Pattern at 800 Mbps
- patible with ANSI/TIA/EIA-644-A LVDS
Standard
- 8 pin SOIC and Space Saving (70%) WSON
Package
- Industrial Temperature Range
DESCRIPTION
The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In many large systems,...
