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SNLS045C
- JULY 1999
- REVISED JULY 2016
DS90LV048A 3-V LVDS Quad CMOS Differential Line Receiver
1 Features
- 1 > 400-Mbps (200-MHz) Switching Rates
- Flow-Through Pinout Simplifies PCB Layout
- 150-ps Channel-to-Channel Skew (Typical)
- 100-ps Differential Skew (Typical)
- 2.7-ns Maximum Propagation Delay
- 3.3-V Power Supply Design
- High Impedance LVDS Inputs on Power Down
- Low Power Design (40 mW at 3.3-V Static)
- Interoperable With Existing 5-V LVDS Drivers
- Accepts Small Swing (350 mV Typical) Differential
Signal Levels
- Supports Input Failsafe
- Open, Short, and Terminated
- 0 V...
