DS92LV3242 Datasheet | Texas Instruments

URES - 2 Wide Operating Range Embedded Clock SER/DES - Up to 32-bit Parallel LVCMOS Data - 20 to 85 MHz Parallel Clock - Up to 2.72 Gbps Application Data Paylod - Selectable Serial LVDS Bus Width - Dual Lane Mode (20 to 50 MHz) - Quad Lane Mode (40 to 85 MHz) - Simplified Clocking Architecture - No Separate Serial Clock Line - No reference Clock Required - Receiver Locks to Random Data - On-Chip Signal Conditioning for Robust Serial Connectivity - Transmit Pre-Emphasis - Data Randomization - DC-Balance Encoding - Receive Channel Deskew - Supports up to 10m CAT-5 at 2.7 Gbps - Integrated LVDS Terminations - Built-in AT-SPEED BIST for End-to-End System Testing - AC-Coupled Interconnect for Isolation and Fault Protection - > 4KV HBM ESD Protection - Space-Saving 64-pin TQFP Package - Full Industrial Temperature Range : -40° to +85°C APPLICATIONS - Industrial Imaging (Machine-Vision) and Control - Security & Surveillance Cameras and...