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LMK1D1216 - Low Additive Jitter LVDS Buffer

This page provides the datasheet information for the LMK1D1216, a member of the LMK1D1212 Low Additive Jitter LVDS Buffer family.

Description

The LMK1D1212 clock buffer distributes with minimum skew one of two selectable clock inputs (IN0, IN1) to 12 pairs of differential LVDS clock outputs (OUT0 through OUT11).

Similarly, the LMK1D1216 distributes 16 pairs of differential LVDS clock outputs (OUT0 through OUT15).

Features

  • High-performance LVDS clock buffer family: up to 2 GHz.
  • 2:12 differential buffer (LMK1D1212).
  • 2:16 differential buffer (LMK1D1216).
  • Supply voltage: 1.71 V to 3.465 V.
  • Low additive jitter: < 60 fs RMS maximum in 12- kHz to 20-MHz at 156.25 MHz.
  • Very low phase noise floor: -164 dBc/Hz (typical).
  • Very low propagation delay: < 575 ps maximum.
  • Output skew: 20 ps maximum.
  • High-swing LVDS (boosted mode): 500-mV VOD typica.

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Datasheet preview – LMK1D1216

Datasheet Details

Part number LMK1D1216
Manufacturer Texas Instruments
File Size 2.79 MB
Description Low Additive Jitter LVDS Buffer
Datasheet download datasheet LMK1D1216 Datasheet
Additional preview pages of the LMK1D1216 datasheet.
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Full PDF Text Transcription

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LMK1D1212, LMK1D1216 SNAS823A – OCTOBER 2021 – REVISED APRIL 2023 LMK1D121x Low Additive Jitter LVDS Buffer 1 Features • High-performance LVDS clock buffer family: up to 2 GHz – 2:12 differential buffer (LMK1D1212) – 2:16 differential buffer (LMK1D1216) • Supply voltage: 1.71 V to 3.465 V • Low additive jitter: < 60 fs RMS maximum in 12- kHz to 20-MHz at 156.
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