LP2995 Datasheet (PDF) Download
Texas Instruments
LP2995

Description

The LP2995 linear regulator is designed to meet the JEDEC SSTL-2 and SSTL-3 specifications for termination of DDR-SDRAM.

Key Features

  • 2 Low Output Voltage Offset
  • Works with +5v, +3.3v and 2.5v Rails
  • Source and Sink Current
  • Low External ponent Count
  • No External Resistors Required
  • Linear Topology
  • Available in SOIC-8, SO PowerPAD-8 or WQFN-16 Packages
  • Low Cost and Easy to Use

Applications

  • SSTL-2