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* 20-ns Read, 13.8-ns Write Through Maximum Access Time
* Functionally Compatible With Commercial 512K x 32 SRAM Devices
* Built-In EDAC (Error Detection an.
of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION D.
The SMV512K32 is a high performance asynchronous CMOS SRAM organized as 524,288 words by 32 bits. It is pin selectable between two modes: master or slave. The master device selection provides user defined autonomous EDAC scrubbing options. The slave .
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