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SN54BCT2827C Datasheet Preview

SN54BCT2827C Datasheet

10-Bit Bus/MOS Memory Drivers

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BiCMOS Design Substantially Reduces ICCZ
Output Ports Have Equivalent 25-
Resistors; No External Resistors Are
Required
Specifically Designed to Drive MOS DRAMs
3-State Outputs Drive Bus Lines or Buffer
Memory Address Registers
Flow-Through Architecture Optimizes
PCB Layout
Power-Up High-Impedance State
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015
Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK) and Flatpacks (W), and
Standard Plastic and Ceramic 300-mil DIPs
(JT, NT)
description
These 10-bit buffers and bus drivers are
specifically designed to drive the capacitive input
characteristics of MOS DRAMs. They provide
high-performance bus interface for wide data
paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with
active-low inputs so if either output-enable (OE1
or OE2) input is high, all ten outputs are in the
high-impedance state. The outputs are also in the
high-impedance state during power-up and
power-down conditions. The outputs remain in the
high-impedance state while the device is powered
down.
The SN54BCT2827C is characterized for opera-
tion over the full military temperature range of
−55°C to 125°C. The SN74BCT2827C is
characterized for operation from 0°C to 70°C.
SN54BCT2827C, SN74BCT2827C
10ĆBIT BUS/MOS MEMORY DRIVERS
WITH 3ĆSTATE OUTPUTS
SCBS007E − APRIL 1987 − REVISED NOVEMBER 1993
SN54BCT2827C . . . JT OR W PACKAGE
SN74BCT2827C . . . DW OR NT PACKAGE
(TOP VIEW)
OE1 1
A1 2
A2 3
A3 4
A4 5
A5 6
A6 7
A7 8
A8 9
A9 10
A10 11
GND 12
24 VCC
23 Y1
22 Y2
21 Y3
20 Y4
19 Y5
18 Y6
17 Y7
16 Y8
15 Y9
14 Y10
13 OE2
SN54BCT2827C . . . FK PACKAGE
(TOP VIEW)
4 3 2 1 28 27 26
A3 5
25 Y3
A4 6
24 Y4
A5 7
23 Y5
NC 8
22 NC
A6 9
21 Y6
A7 10
20 Y7
A8 11
19 Y8
12 13 14 15 16 17 18
NC - No internal connection
FUNCTION TABLE
INPUTS
OE1 OE2 A
OUTPUT
Y
L
L
L
L
L
L
H
H
H
X
X
Z
X
H
X
Z
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1993, Texas Instruments Incorporated
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
2−1




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SN54BCT2827C Datasheet Preview

SN54BCT2827C Datasheet

10-Bit Bus/MOS Memory Drivers

No Preview Available !

SN54BCT2827C, SN74BCT2827C
10ĆBIT BUS/MOS MEMORY DRIVERS
WITH 3ĆSTATE OUTPUTS
SCBS007E − APRIL 1987 − REVISED NOVEMBER 1993
logic symbol
1
OE1 13
OE2
&
EN
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
10
A9
11
A10
23
1
Y1
22
Y2
21
Y3
20
Y4
19
Y5
18
Y6
17
Y7
16
Y8
15
Y9
14
Y10
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the DW, JT, NT, and W packages.
schematic of each output
VCC
logic diagram (positive logic)
1
OE1
OE2 13
2
A1
23
Y1
To Nine Other Channels
GND
Output
2−2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443


Part Number SN54BCT2827C
Description 10-Bit Bus/MOS Memory Drivers
Maker etcTI
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