SN65LVCP204 Datasheet | Texas Instruments

FEATURES - Up to 2.5-Gbps Operation - Non-Blocking Architecture Allows Each Output to Be Connected to Any Input - 30 ps of Deterministic Jitter - Selectable Transmit Preemphasis Per Lane - Selectable Receive Equalization - Available Packaging: 48-Pin QFN - Propagation Delay Times: 500 ps Typical - Inputs Electrically patible With CML Signal Levels - Operates From a Single 3.3-V Supply - Ability to Place Ouputs in High-Impedance State - Low Power: 560 m W - Integrated Termination Resistors APPLICATIONS - Clock Buffering/Clock MUXing - Wireless Base Stations - High-Speed Network Routing - Tele/Data DESCRIPTION The SN65LVCP204 is a 4×4 non-blocking crosspoint switch in a flow-through pinout that allows for ease in PCB layout. VML signaling is used to achieve a high-speed data throughput while using low power. Each of the output drivers includes a 4:1 multiplexer to allow any input to be routed to any output. Internal signal paths are fully differential to achieve high signaling speeds while maintaining low signal skews. The SN65LVCP204 incorporates 100-Ω termination resistors for those applications where board space is at a premium. Transmit preemphasis and receive equalization are built in for superior signal integrity performance. 1DE 2DE 3DE The SN65LVCP204 is characterized for operation from - 40°C to 85°C. 4DE Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2009, Texas Instruments Incorporated SLLS913 - MARCH 2009...