SN65LVDS116 Datasheet | Texas Instruments

.ti. SLLS370D - SEPTEMBER 1999 - REVISED FEBRUARY 2005 16-PORT LVDS REPEATER Features - One Receiver and Sixteen Line Drivers Meet or Exceed the Requirements of ANSI EIA/TIA-644 Standard - Typical Data Signaling Rates to 400 Mbps or Clock Frequencies to 400 MHz - Enabling Logic Allows Separate Control of Each Bank of Four Channels or 2-Bit Selection of Any One of the Four Banks - Low-Voltage Differential Signaling With Typical Output Voltage of 350 mV and a 100-Ω Load - Electrically patible With LVDS, PECL, LVPECL, LVTTL, LVCMOS, GTL, BTL, CTT, SSTL, or HSTL Outputs With External Termination Networks - Propagation Delay Times < 4.7 ns - Output Skew Is < 300 ps and...