* Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
* Clock Rates to 2 GHz
* 140-ps Output Transition Times
* 0.11 ps Typical Intrinsic Phase Jitter
* Less than 630 ps Propagation Delay Times
* 2.5-V or 3.3-V Supply Operation
* 2-mm
SN65LVDS16 Datasheet (883.38 KB)
SN65LVDS16
883.38 KB
2.5-v/3.3-v oscillator gain stage/buffers.
www.ti.com SN65LVDS16, SN65LVP16 SN65LVDS17, SN65LVP17 SLLS625B SEPTEMBER 2004 REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN .
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