* Low-Voltage PECL Input and Low-Voltage PECL or LVDS Outputs
* Clock Rates to 1 GHz
* 250-ps Output Transition Times
* 0.12 ps Typical Intrinsic Phase Jitter
* Less than 630 ps Propagation Delay Times
* 2.5-V or 3.3-V Supply Operation
* 2-mm
SN65LVDS19 Datasheet (879.07 KB)
SN65LVDS19
879.07 KB
2.5-v/3.3-v oscillator gain stage/buffers.
www.ti.com SN65LVDS18, SN65LVP18 SN65LVDS19, SN65LVP19 SLLS624B SEPTEMBER 2004 REVISED NOVEMBER 2005 2.5-V/3.3-V OSCILLATOR GAIN .
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