Datasheet Summary
D Controlled Baseline
- One Assembly/Test Site, One Fabrication Site
D Enhanced Diminishing Manufacturing
Sources (DMS) Support
D Enhanced Product-Change Notification D Qualification Pedigree† D State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
D Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
† ponent qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold pound life. Such...