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SN74AHC00D Datasheet Preview

SN74AHC00D Datasheet

QUADRUPLE 2-INPUT POSITIVE-NAND GATE

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www.ti.com
SN54AHC00
SN74AHC00
SCLS227J – OCTOBER 1995 – REVISED MAY 2013
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
Check for Samples: SN54AHC00, SN74AHC00
FEATURES
1
• Operating Range 2-V to 5.5-V
• Latch-Up Performance Exceeds 250 mA Per
JESD 17
• ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
SN54AHC00 . . . JORWP ACKAGE
SN74AHC00 . . . D,DB,DGV,N,NS,
OR PW PACKAGE
(TOP VIEW)
1A 1
1B 2
1Y 3
2A 4
2B 5
2Y 6
GND 7
14 VCC
13 4B
12 4A
11 4Y
10 3B
9 3A
8 3Y
SN74AHC00 . . . RGY PACKAGE
(TOP VIEW)
1
1B 2
1Y 3
2A 4
2B 5
2Y 6
7
14
13 4B
12 4A
11 4Y
10 3B
9 3A
8
SN54AHC00 . . . FK PACKAGE
(TOP VIEW)
3 2 1 20 19
1Y 4
18 4A
NC 5
17 NC
2A 6
16 4Y
NC 7
15 NC
2B 8
14 3B
9 10 11 12 13
NC − No internal connection
DESCRIPTION
The ’AHC00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic.
FUNCTION TABLE
(EACH GATE)
INPUTS
OUTPUT
A
B
Y
H
H
L
L
X
H
X
L
H
LOGIC DIAGRAM, EACH GATE (POSITIVE LOGIC)
A
Y
B
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1995–2013, Texas Instruments Incorporated




etcTI

SN74AHC00D Datasheet Preview

SN74AHC00D Datasheet

QUADRUPLE 2-INPUT POSITIVE-NAND GATE

No Preview Available !

SN54AHC00
SN74AHC00
SCLS227J – OCTOBER 1995 – REVISED MAY 2013
www.ti.com
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE
UNIT
Supply voltage range, VCC
Input voltage range, VI(2)
Output voltage range, VO(2)
Input clamp current, IIK (VI < 0)
Output clamp current, IOK (VO < 0 or VO > VCC)
Continuous output current, IO (VO = 0 to VCC)
Continuous current through VCC or GND
D package(3)
DB package(3)
DGV package(3)
Package thermal impedance, θJA
N package(3)
NS package(3)
PW package(3)
RGY package(4)
–0.5 to 7
–0.5 to 7
–0.5 to VCC + 0.5
–20
±20
±25
±50
86
96
127
80
76
113
47
V
V
V
mA
mA
mA
mA
°C/W
Storage temperature range, Tstg
–65 to 150
°C
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
(4) The package thermal impedance is calculated in accordance with JESD 51-5
RECOMMENDED OPERATING CONDITIONS(1)
SN54AHC00
MIN
MAX
SN74AHC00
MIN
MAX
UNIT
VCC
Supply voltage
VIH
High-level input voltage
VIL
Low-level Input voltage
VI
Input voltage
VO
Output voltage
IOH
High-level output current
IOL
Low-level output current
Δt/Δv
TA
Input Transition rise or fall rate
Operating free-air temperature
VCC= 2 V
VCC= 3V
VCC= 5.5 V
VCC= 2 V
VCC= 3 V
VCC= 5.5 V
VCC= 2 V
VCC= 3.3 V ± 0.3 V
VCC= 5 V ± 0.5 V
VCC= 2 V
VCC= 3.3 V ± 0.3 V
VCC= 5 V ± 0.5 V
VCC= 3.3 V ± 0.3 V
VCC= 5 V ± 0.5 V
2
5.5
2
5.5
V
1.5
1.5
2.1
2.1
V
3.85
3.85
0.5
0.5
0.9
0.9
V
1.65
1.65
0
5.5
0
5.5
V
0
VCC
–50
0
VCC
V
–50
–4
–4
mA
–8
–8
50
50
4
4
mA
8
8
100
100
ns/V
20
20
–55
125
–40
125
°C
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
2
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Copyright © 1995–2013, Texas Instruments Incorporated
Product Folder Links: SN54AHC00 SN74AHC00


Part Number SN74AHC00D
Description QUADRUPLE 2-INPUT POSITIVE-NAND GATE
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